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Asian Journal of Information Technology

ISSN: Online 1993-5994
ISSN: Print 1682-3915
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An FPGA Based Implementation of CA-CFAR Processor

Thamir R. Saed , Jawad K. Ali and Ziad T. Yassen
Page: 511-514 | Received 21 Sep 2022, Published online: 21 Sep 2022

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Abstract

In this study, a constant false alarm rate processor is investigated and a special focusing is devoted to the cell-average constant false alarm rate (CA-CFAR) processor. This processor is analyzed and its performance is estimated. An FPGA-based CA-CFAR processor has been implemented using Xilinx integrated circuit chip XC9600. The implemented processor using this technique has been tested with signals imbedded with different types of clutter and noise-alike signals. The implementation process and the processor response reflect how this digital tool is excellent due to its high reliability and flexibility.


How to cite this article:

Thamir R. Saed , Jawad K. Ali and Ziad T. Yassen . An FPGA Based Implementation of CA-CFAR Processor.
DOI: https://doi.org/10.36478/ajit.2007.511.514
URL: https://www.makhillpublications.co/view-article/1682-3915/ajit.2007.511.514