TY  - JOUR
T1  - An Area-Optimized Chip of Ant Colony Algorithm Design in Hardware Platform using the
Address-Based Method
AU - Shafigh Fard, E. AU - Nadimi, M.H. AU - Monfaredi, K. 
JO  - International Journal of System Signal Control and Engineering Application
VL  - 13
IS  - 3
SP  - 45
EP  - 52
PY  - 2020
DA  - 2001/08/19
SN  - 1997-5422
DO  - ijssceapp.2020.45.52
UR  - https://makhillpublications.co/view-article.php?doi=ijssceapp.2020.45.52
KW  - hardware platform
KW  -complex problems
KW  -chip area
KW  -reconfigurable chip
KW  -Ant colony
AB  - The ant colony algorithm is a nature-inspired
algorithm highly used for solving many complex
problems and finding optimal solutions, however, the
algorithm has a major flaw and that is the vast amount of
calculations and if the proper correction algorithm and
architectural design are not provided, it will lead to the
increasing use of hardware platform due to the high
volume of operations and perhaps at higher scales, it
causes the chip area not to work because of the high
number of problems, hence, the purpose of this study is to
save the hardware platform as far as possible and use it
optimally through providing a particular algorithm
running on a reconfigurable chip-driven by the
address-based method, so that, the comparison of
synthesis operations with the similar works shows
significant improvements as much as 1/3 times greater
than the other similar hardware methods.
ER  -