TY  - JOUR
T1  - An Efficient Use of Memory Grouping Algorithm for Implementation of
BIST in Self Test
AU - Kumar Ojha, Sunil AU - Singh, O.P. AU - Mishra, G.R. AU - Vaya, P.R. 
JO  - Journal of Engineering and Applied Sciences
VL  - 14
IS  - 8
SP  - 2695
EP  - 2700
PY  - 2019
DA  - 2001/08/19
SN  - 1816-949x
DO  - jeasci.2019.2695.2700
UR  - https://makhillpublications.co/view-article.php?doi=jeasci.2019.2695.2700
KW  - Design for test
KW  -memory grouping
KW  -built in self test
KW  -test time
KW  -testing memories
KW  -BIST
AB  - Design for test engineers has to group memories for BIST implementation. But there are various
problems involved during memory grouping such as number of memories are increasing day by day and DFT
engineers spends lots of time on grouping memories for BIST structure. Also, the memories may have different
frequency of operation and the physical placement may also be different and scattered. This study presents
an algorithm to group the memory in an efficient way such that it reduces the effort of memory grouping for
BIST structure and BIST can support the grouping. Also, it take care the power during memory BIST operation.
ER  -