TY  - JOUR
T1  - A New Design of a Voltage Source MLI and Analysis of its Applicability for
Medium Power Requirements
AU - Singh, Varsha AU - Gupta, Shubhrata AU - Pattnaik, Swapnajit 
JO  - Journal of Engineering and Applied Sciences
VL  - 13
IS  - 3
SP  - 700
EP  - 708
PY  - 2018
DA  - 2001/08/19
SN  - 1816-949x
DO  - jeasci.2018.700.708
UR  - https://makhillpublications.co/view-article.php?doi=jeasci.2018.700.708
KW  - Multi Level Inverter (MLI) asymmetrical topology
KW  -voltage Level Incremental Cell (LIC)
KW  -Total Harmonic Distortion (THD)
KW  -efficiency
KW  -experimental prototype
KW  -India
AB  - Multilevel inverters are being utilized widely and has generated immense interest in industry and
research. While the conventional topologies have proved to be viable options for high power and medium
voltage applications, a lot of research in this field is leading to continuous emergence of newer topologies
aimed at reducing power losses while increasing the efficiency of the inverter. In this study, a distinct topology
of MLI has been proposed that is recognizably different from the conventional topology. This new design uses
fewer number of DC sources to generate maximum voltage levels, accordingly the count of power switches
also lessens, leading to better spectrum and minimum distortion. Asymmetrical topology is used to generate
15 level stepped voltage output and addition of voltage Level Incremental Cell (LIC) in the same topology,
further improves the voltage level up to 29 levels for single phase inverter resulting in lowering of Total
Harmonic Distortion (THD). The capability of the experimental prototype for proposed MLI topology to
produce intended voltage levels are further corroborated by the simulation results generated using
MATLAB/Simulink.
ER  -