TY  - JOUR
T1  - Critical Challenges and Solutions for Device Miniaturization in
Integrated Circuit Packaging Technology
AU - Anuar Nayan, Nazrul AU - Rahman, A.R.A. 
JO  - Journal of Engineering and Applied Sciences
VL  - 13
IS  - 15
SP  - 6025
EP  - 6032
PY  - 2018
DA  - 2001/08/19
SN  - 1816-949x
DO  - jeasci.2018.6025.6032
UR  - https://makhillpublications.co/view-article.php?doi=jeasci.2018.6025.6032
KW  - die attachment
KW  -wafer sawing
KW  -backgrinding
KW  -manufacturing industry
KW  -wire bonding
KW  -Packaging
AB  - Recently, the number of wearable devices increases due to demands. Therefore, a considerably light,
thin and high complexity Integrated Circuit (IC) packaging is desirable. However, several critical challenges exist
in implementing ICs in the packaging manufacturing industry. Die cracking and warpage due to high stress are
the common failures. These conditions will worsen when using small and thin dies. Package stresses are
predominantly caused by the mismatch in the thermal expansion coefficients of the involved materials. This
study conducts experimental studies on the critical packaging processes such as backgrinding, wafer sawing,
die attachment and wire bonding, using 18×14 mil die size. The manufacturing process stability is developed
by process optimization, monitoring and control. Several critical challenges and proposals for device
miniaturization in IC packaging are highlighted in conclusion section.
ER  -