TY  - JOUR
T1  - Compact Hardware Implementation of FPGA Based RC6 Block Cipher
AU - , Faez F. Shareef AU - , Ashwaq Talib Hashim AU - , Waleed F. Shareef 
JO  - Journal of Engineering and Applied Sciences
VL  - 3
IS  - 7
SP  - 598
EP  - 601
PY  - 2008
DA  - 2001/08/19
SN  - 1816-949x
DO  - jeasci.2008.598.601
UR  - https://makhillpublications.co/view-article.php?doi=jeasci.2008.598.601
KW  - RC6
KW  -FPGA
KW  -encryption
KW  -resources sharing
AB  - This study presents the implementation of RC6 Block cipher that involve encryption and decryption on FPGA Virtex II device with highly compact architecture through reuse the same units for the identical operation in both algorithms. The proposed design also analyzes the cipher mathematical operation to fit it into FPGA available resources.
ER  -