TY  - JOUR
T1  - A New Technique to Implement Filtered X-LMS Algorithm for Active Noise Control Applications Using Reconfigurable Logic
AU - , N.J.R. Muniraj AU - , R.S.D. Wahidhabanu 
JO  - Journal of Engineering and Applied Sciences
VL  - 2
IS  - 5
SP  - 864
EP  - 869
PY  - 2007
DA  - 2001/08/19
SN  - 1816-949x
DO  - jeasci.2007.864.869
UR  - https://makhillpublications.co/view-article.php?doi=jeasci.2007.864.869
KW  - X-LMS
KW  -alogrithm
KW  -fillered
KW  -FPGA
KW  -ASIC
AB  - This study proposes the implementation of Filtered X-LMS algorithm into VLSI using Verilog HDL for active noise control applications. This ASIC chip was designed, simulated and synthesized using Xilinx FPGA Virtex 2P (2vp40ff1148-6) and the workability of the algorithm was tested for noise cancellation and verified using MATLAB. The operating frequency was about 24 MHZ.
ER  -