TY  - JOUR
T1  - Performance Analysis of Homogeneous and Heterogeneous Multicore Processor Using Static and Dynamic Schedulers
AU - Radhamani, A.S. 
JO  - Asian Journal of Information Technology
VL  - 15
IS  - 3
SP  - 533
EP  - 541
PY  - 2016
DA  - 2001/08/19
SN  - 1682-3915
DO  - ajit.2016.533.541
UR  - https://makhillpublications.co/view-article.php?doi=ajit.2016.533.541
KW  - Multi-core
KW  -homogeneous
KW  -heterogeneous
KW  -scheduling
KW  -wait free datastructure
KW  -performance
KW  -power consumption
AB  - Now a days, there is a need in the design of multicore processor in order to improve system performance, and reducing power consumption. Homogenous cores are all exactly the same: equivalent frequencies, cache sizes, functions, etc. However, each core in a heterogeneous system may have a different function, frequency, memory model, etc. There is an apparent trade-off between processor complexity and customization. This study presents a comparison between homogeneous multicore processor and heterogeneous one. This study examines in detail the performance and power consumption by increasing the number of cores in Intel processor. In this study, four different scheduling algorithms for finding near-optimal thread to core assignments in a multicore processor is explored with and without wait free data structure is integrated with each scheduling paradigm. The results demonstrate that heterogeneous multicore architecture can provide significantly higher performance than a homogeneous chip multiprocessor. It does so by matching the various jobs of a diverse workload to the various cores.
ER  - 