TY  - JOUR
T1  - Reconfigurable Multiprocessor System Reliability Estimation
AU - , Oleg Viktorov 
JO  - Asian Journal of Information Technology
VL  - 6
IS  - 9
SP  - 958
EP  - 960
PY  - 2007
DA  - 2001/08/19
SN  - 1682-3915
DO  - ajit.2007.958.960
UR  - https://makhillpublications.co/view-article.php?doi=ajit.2007.958.960
KW  - Reconfigurable multiprocessor systems
KW  -redundancy
KW  -single bus interconnection
KW  -multiple bus interconnection
KW  -multiport memory unit
KW  -cross-bar interconnection unit
AB  - Reconfigurable multiprocessor systems offer an approach for improvement of system reliability. On the one hand the faults do not cause the whole system down because of the redundancy of such systems and suitable reconfiguration actions. From the other hand, higher system performance means more processors and other modules, which may result in more faults and a higher risk that system fails. Since classical reliability evaluation technique is not applicable to reconfigurable multiprocessor systems, another approach to reliability evaluation is presented. The result shows that the systems with multibus interconnection are the most reliable among all reconfigurable multiprocessor systems with bus oriented interconnection unit.
ER  -