TY  - JOUR
T1  - A Fast Testable Digital Fuzzy Logic Controller
AU - , Chemali, H. AU - , A. Khellaf AU - , A. Benhamadouche AU - , A. Ballouti 
JO  - Asian Journal of Information Technology
VL  - 5
IS  - 12
SP  - 1464
EP  - 1469
PY  - 2006
DA  - 2001/08/19
SN  - 1682-3915
DO  - ajit.2006.1464.1469
UR  - https://makhillpublications.co/view-article.php?doi=ajit.2006.1464.1469
KW  - Fuzzy controller
KW  -VHDL
KW  -test
KW  -scan
KW  -bist
KW  -signature
AB  - This study presents a hardware implementation of a two-input-one-output digital fuzzy logic controller. A new functional testing technique, based on fuzzy testing rules, is developed A fuzzy logic controller has been implemented on FPGA using VHDL hardware description language. A testable versatile soft core controller is designed with high degree of flexibility and portability and so numerous applications of this controller are possible. FPGA reprogramming and reconfigurable facilities are the driving force behind getting rapid hardware design improvements. High performance and fast controller responses are achieved by simple parameter tuning and pipelined methods. The pipelined structure adds to the soft core design efficient means for in-depth parameters controlling. As test is of prime interest, each part of this controller has been designed to grow up its testability. FPGA’s Look-Up Table are used to prevent temporal fault occurring and to increase controller decision speed. This design approach is carried out not only to improve fuzzy controller speed and reliability but to get a well structured IP core.
ER  - 