TY  - JOUR
T1  - Area and Power Optimized Hardware Design of Bi-Phase Space Coding/Phase
Coding Technique for Wireless Sensor Applications
AU - Rajakumar, G. AU - Roobert, A.B.E. Andrew 
JO  - Asian Journal of Information Technology
VL  - 15
IS  - 19
SP  - 3657
EP  - 3663
PY  - 2016
DA  - 2001/08/19
SN  - 1682-3915
DO  - ajit.2016.3657.3663
UR  - https://makhillpublications.co/view-article.php?doi=ajit.2016.3657.3663
KW  - Phase Code (PC)
KW  -Bi-Phase Space Code (BPSC)
KW  -VLSI
KW  -low power
KW  -WSN
AB  - Wireless sensor nodes are used in wide range of applications. Most of them require short range communication. Phase Code (PC) or Bi-Phase Space Code (BPSC) can be used for this communication. Wireless sensor nodes has to be compact and should require less power. Half duplex communication can be used for the Wireless Sensor Network (WSN). In this study, Phase/Bi-Phase Space Code Generation and Degeneration technique is designed in a single system. Based on the control inputs, the operation of the system can be selected. Both systems are using the same hardware. Number of transistors is reduced from 66-55 (reduced by 16.66%). This system was designed and analyzed using Cadence 180 nm technology. Power consumption is reduced around 15% and it depends on the operating frequency and operation of the system. This system occupies 22.94×65.705 μm2 (reduced by 61.93%).
ER  -