TY - JOUR T1 - Adaptive Streams-C Design Methodology for SoRC Based on Modern FPGA AU - , Mtibaa, A. AU - , A. Sboui AU - , E. Bourennane JO - International Journal of Soft Computing VL - 1 IS - 4 SP - 261 EP - 270 PY - 2006 DA - 2001/08/19 SN - 1816-9503 DO - ijscomp.2006.261.270 UR - https://makhillpublications.co/view-article.php?doi=ijscomp.2006.261.270 KW - FPGA KW -SoC KW -SoRC KW -IP KW -streams-C KW -powerPC KW -coreconnect AB - In recent years, the use of FPGA "Field Programmed Gate Arrays" as the main suitable circuit for SoC "System on Chip" prototyping has launched an ever-increasing FPGA capacity mass production. FPGA based systems offer the programmability of software, allowing various applications to be mapped to them. Those circuits, specially the modern FPGAs, witch actually containing one or more embedded processor cores (both hard and soft cores) are quickly becoming a mainstream architecture for high performance application. Hoverer the lack of co-design tools witch fully support those new architectures has introduced the so-called Design Productivity Crisis. To remedy this gap, a great effort has launched in researching of an CAD "Computer Aid design" tool that is oriented towards hardware rather than software development with a reasonable abstraction level, witch established standards industry-wide and/or the efficient interface synthesis tools making the integration of IPs "Intellectual Property" from different provider and/or technologies in the same SoC will be more easy. In this study we aim to extend the Streams-C design and synthesis environment in order to support those new challenges. ER -